洪浩喬

Stable and Generalizable Gradient Propagation for Event-Driven Learning in Spiking Neural Networks

電控工程研究所

脈衝神經網路、事件驅動學習、脈衝時間梯度、梯度穩定性、梯度傳遞、膜電位、神經元模型泛用性、Spiking Neural Networks、Event-Driven Learning、Spike-Time Gradient、Gradient Stability、Gradient Propagation、Membrane Potential、Generalization Across Neuron Models

A Shared-Timing and Low-MAC-Aware SAR ADC Array with Direct Current Quantization for High-Parallelism Current-Mode Analog Computing-in-Memory

電機工程學系

記憶體內運算、類比式記憶體內運算、電流式記憶體內運算、直接電流量化、SAR ADC陣列、低MAC值感知、共用時序控制、computing-in-memory、analog computing-in-memory、current-mode computing-in-memory、direct current quantization、SAR ADC array、low-MAC-aware、shared timing control

A Current-Mode Analog Computing-in-Memory Design With A SRAM-Based Input Layer for Computing Multiple-Bit Inputs, Weights, and Outputs

電機工程學系

類神經網路、電流式類比記憶體內運算、SRAM輸入層、多位元輸入、多位元權重、Artificial neural networks、Current-mode analog computing-in-memory、SRAM-based input layer、Multi-bit input、Multi-bit weight

Design and Characterization of a 16-nm 16-kb Ultra-Low Leakage 11T SRAM Array With Low Current Variations for Compute-in-Memory Applications

電機工程學系

記憶體內運算、鰭式場效應電晶體製程、極低漏電流、低電流變異、靜態隨機存取記憶體、電流特徵測試電路、compute-in-memory、FinFET process、ultra-low leakage current、low current variation、static random access memory、test circuit for current characterization

A 10 Gb/s Domino QPSK Transceiver for Die-to-Die Communications

電控工程研究所

四相位移鍵調變、時脈與資料回復、高速有線傳輸、無鎖相迴路、QPSK、CDR、High-Speed Wireline、PLL-less

Design of a 20Gb/s PAM-4 Clock and Data Recovery Circuit Using Sub-Baud-Rate Sampling

電控工程研究所

四相位振幅調變、時脈與資料回復、次鮑率取樣、高速有線傳輸、串列器解串列器、4-level Pulse Amplitude Modulation(PAM4)、clock and data recovery(CDR)、Sub-Baud-Rate sampling、high-speed wireline communication、SerDes

Design of A Readout Circuit With An Automatic Resonant Frequency Tracking Loop for Radio-Frequency Resonant Sensors

電機工程學系

共振頻率追蹤、多頻段LC共振器、平面環形共振器、水分含量偵測、感測器讀取電路、鎖相迴路、resonant frequency tracking、multi-band LC resonator、planar loop resonator、hydration sensing、sensor readout circuit、phase locked loop

A 5-Gb/s, 0.12-pJ/bit, BPSK based Clock and Data Recovery Circuits for Wireline Communications

電機工程學系

二相位偏移調變、連續時間線性均衡器、高速有線傳輸、時脈與資料回復、串列器解串列器、延遲鎖定迴路、Binary Phase Shift Keying、Clock and Data Recovery、High-Speed Wired Transmission、Continuous-Time Linear Equalizer、Delay Locked Loop、Serializer Deserializer

Design of A Neuromorphic Spiking Neural Network with Multiple-bit Weights Using Current-Mode Analog Computing in Memory to Process TTFS Signals

電機工程學系

脈衝類神經網路、仿大腦計算、記憶體內運算、二階漏積分細胞體電路、多位元權重、Spiking Neuron Networks、Computing-in-memory、Second order Leaky-Integrate and fire circuit、Multiple bit weight

A High-Throughput Current-Mode Computing-in-Memory Circuit Design with Multi-bit Weights, Inputs, and Outputs Using Low-Leakage Read-Decoupled 8T SRAM and A SAR ADC Array

電機工程學系

人工智慧、邊緣運算、記憶體內運算、靜態隨機存取記憶體、類神經網路、全電流式相乘相加運算、Artificial intelligence、edge computing、CIM、static random-access memory (SRAM)、neural networks、full current-mode MAC

Design of a Continuous-Time Delta-Sigma Modulator with a Dynamic-Element-Matching-Inherent Feedback-Assisted Quantizer

電機工程學系

高頻寬、連續時間三角積分調變器、動態元件匹配、回授輔助量化器、環形翻轉式數位積分器、wide-bandwidth、continuous-time Delta-Sigma modulator、dynamic element matching、feedback-assisted quantizer、circular flipping digital integrator

Design of A 4-APSK-Based Serial Link for High-Speed Wireline Communications

電機工程學系

串列資料傳輸系統、資料與時脈回復電路、連續線性等化器、相位偏移調變、阻抗匹配、SerDes、clock and data recovery、continuous time linear equalizater、phase-shift keying、impedance matching

Design of a 5 MS/s 11-bit SAR ADC with Redundancy

電機資訊國際學程

循序漸進式類比數位轉換器、式DAC、冗餘碼、Redundancy、DAC settling、SAR ADC

A Relaxation Oscillator with Analog Closed-loop Temperature Compensation Circuits

電機學院電機與控制學程

弛張振盪器、溫度補償、相位噪音、Relaxation Oscillator、Temperature Compensation、Phase Noise

A Capacitive Sensor Readout Scheme Using Self-Calibrated Resonant Magnetic Coupling Wireless Power Transfer System

電機工程學系

無線傳輸、自我校正、傳感器、磁共振式無線充電、Wireless Power Transfer、Self-Calibrated、LC sensor、Resonant Magnetic Coupling

Design of High-Speed Wireline Communication System Design Based on Pseudo QPSK

電控工程研究所

偽四相位偏移調變、時脈與資料回復、串列器解串列器、延遲鎖定迴路、高速有線傳輸、連續時間線性均衡器、pQPSK、clock and data recovery(CDR)、SerDes、delay-locked loop(DLL)、High-speed wireline communication、Continuous Time Linear Equalizer

Design and Implementation of a Phased Array Transmitter Calibration Algorithm

電機工程學系・共同指導：蘇朝琴

相位控制天線陣列、校正、發射器、射頻非理想效應、Phased Array、Calibration、Transmitter、RF Impairments

Implementation of a Self-Calibrated Resonant Magnetic Coupling Wireless Power Transfer System with Optimal Power Transfer Efficiency and Maximal Transferred Power

電控工程研究所

無線充電、自我校正、最佳傳輸效率、最大傳輸功率、磁共振式無線充電、Wireless Power Transfer、Self-Calibrated、Optimal Power Transfer Efficiency、Maximal Transferred Power、Resonant Magnetic Coupling

Test Circuit Implementation for Characterizing A 8T 8-kb SRAM Used In Computing-In-Memory Applications

電控工程研究所

人工智慧、馮紐曼瓶頸、記憶體內運算、記憶體單元電流、8T SRAM、artificial intelligence (AI)、Von-Neumann bottleneck、Computing-In-Memory (CIM)、currents of the memory cells

Integrating-Potential Backpropagation Training Method for Spiking Neural Networks with Triangular Spike Response Kernels

電控工程研究所

脈衝類神經網路、反向傳播法、時間編碼、脈衝響應模型、脈衝時序依賴可塑性、適應性閾值、MNIST數據集、Spiking Neural Network、Back-propagation、Temporal Coding、Spike Response Model、Spike-Time-Dependent Plasticity、Adaptive Threshold、MNIST database

A Spatial and Temporal Training Method for Spiking Neural Net-works with Second-Order Leaky Integrate-and-Fire Models

電控工程研究所

脈衝類神經網路訓練法、脈衝類神經網路、時間編碼、二階漏積分發射模型、Spiking Neural Networks Training Method、Spiking Neural Networks、Temporal Coding、Second-Order LIF Model

Computing-in-Memory Circuit Design for Spiking Neural Networks with Low Leakage 8T-SRAM

電機工程學系

脈衝神經網路、仿人腦計算、神經型態運算、記憶體內運算、低漏電靜態隨機存取記憶體、Spiking Neural Networks、Brain-inspired computing、neuromorphic computing、Computing-in-Memory、Low Leakage Static random-access memory

Low-Power and Compact Domino QPSK Clock and Data Recovery Circuits for Wireline Communications

電機工程學系

四相位移鍵調變、時脈與資料回復、串列解串列器、高速有線傳輸、解調變器、無鎖相迴路、QPSK、CDR、SerDes、High-speed wireline communication、demodulator、PLL-Free

Redundancy Algorithm for Multiple Bits per Conversion Step and its Application to the Design of a 200 MS/s 9-bit SAR ADC

電控工程研究所

類比數位轉換器、逐漸趨近式類比數位轉換器、冗餘位、數位錯誤校正、SAR ADC、ADC、redundant bit、digital error correction

Design of Low Power BPSK Clock and Data Recovery Circuits with Background Delay Calibration for High-Speed Wireline Communica-tion

電控工程研究所

時脈與資料回復電路、相位偏移調變、內建式自我檢測、延遲鎖定迴路、背景式校正、連續時間線性均衡器、串列器／解串列器、clock and data recovery (CDR)、phase-shift keying (PSK)、built-in self test (BIST)、delay-locked loop (DLL)、background calibration、Continuous Time Linear Equalizer (CTLE)、SERDES

Accurate and Fast On-Wafer Test Circuitry Design for Characterizing Device Array in Wafer Acceptance Test

電機工程學系

晶圓接受測試、陣列化測試結構設計、製程變異、多斜率積分類比數位轉換器、wafer acceptance test、device array characterization、process variation、multi-slope slope analog-to digital converter

Design of a Continuous-Time Delta-Sigma Modulator Using High-Speed Cost-Effective All-Digital ELD Compensation Circuits

電機工程學系

連續時間三角積分調變器、數位式多餘迴路延遲補償、高速、低成本、減少傳播延遲、溫度計編碼減法、使用輪轉式溫度計編碼減法之數位式多餘迴路延遲補償技術、Continuous-time delta-sigma modulator (CTDSM)、digital excess loop delay (ELD) compensation (ELDC)、high-speed、cost-effective、propagation delay reduction、thermometer-code subtraction (TCS)、rotating-thermometer-code subtraction (RTCS) ELDC technique

Efficient test stimulus design for continuous-time LTI analog circuits using the transfer function based analog fault model

電機工程學系

錯誤模型、測試信號設計、抗拒測試雜訊、fault modal、test stimuli design

A CMOS-MEMS Inductive Pressure Sensor with Low Q Inductor and Oscillator Circuit

電機工程學系・共同指導：邱一

微機電、低Q值、壓力感測器、電感式、振盪器、CMOS MEMS、low Q、pressure sensor、inductive、oscillator circuit

CMOS MEMS Variable Inductance Accelerometer with Digital Output

電控工程研究所・共同指導：邱一

微機電、加速度計、可變電感、振盪器、頻率輸出、數位輸出、CMOS MEMS、Accelerometer、Variable Inductance、Oscillator、Frequency Output、Digital Output

Implementation of a Receiver IC with Resonant Frequency Calibration Function for Enhancing the Power Transfer Efficiency of the Magnetic Resonant Wireless Power Transfer System

電控工程研究所

無線功率傳輸、共振頻率、校正、效率、Wireless Power Transfer、Resonant Frequency、Calibration、Efficiency

Self-calibrated transmitter and receiver IC design of resonant magnetic coupling wireless power transfer systems for the optimal power transfer efficiency and maximal transferred power

電機工程學系

無線充電、磁共振、自我校正、共振頻率、wireless power transfer、magnetic resonance、self-calibration、resonant frequency

Design of a Two-bit/Step 9-bit SAR ADC with Redundant Bits

電機工程學系

逐漸逼近式類比數位轉換器、每次轉換兩位元、參考電壓產生、冗餘位、SAR ADC、2b / cycle、reference voltage、redundant bit

Implementation of An On-Wafer Wide-Dynamic 12-bit Dual Slope Current Input ADC for Wafer Acceptance Tests

電機工程學系

晶圓接受測試、電流量測、雙斜率類比轉換器、類比轉換器、wafer acceptance test、current measurement、Dual-slope Analog-to-Digital Converter、Analog-to-Digital Converter

Tri-axis CMOS MEMS Accelerometer With Variable Inductors

電控工程研究所・共同指導：邱一

可變電感、加速度計、LC振盪器、Variable inductors、Accelerometer、LC tank Oscillator

Design of Energy-Efficient and High Data-Rate PSK Demodulators

電機工程學系

相位偏移調變、解調器、低功耗、高資料率、解調變、Phase-shift keying、Demodulator、Low power、High data-rate、Demodulation

Fully Integrated BIST Circuit Designs for Delta-Sigma ADCs

電控工程研究所

內建自我測試、三角積分式類比數位轉換器、類比數位轉換器測試、類比及混合訊號電路測試、3D IC 測試、Built-in self-test、Delta-Sigma Analog-to-digital converter、ADC test、Analog and mixed-signal test、3D IC test

Design of an All-Digital Frequency Synthesizer with a Temperature Compensated Digitally Controlled Oscillator

電機工程學系

頻率合成器、溫度補償、電壓控制振盪器、Frequency Synthesizer、Temperature Compensation、Voltage-Controlled Oscillator

Experience with an Analog/Mixed-Signal IP Behavioral Modeling and Application : Case Study of Spread Spectrum Clock Generator

電機學院電機與控制學程・共同指導：李育民

類比行為模型、Analog Behavioral Model

Implementation of a 14-bit 200-MS/s Current-Steering DAC with Digital Foreground Calibration in 90-nm CMOS

電機工程學系

前景式校正、電流導向式、數位類比轉換器、Foreground calibration、Current-Steering、Digital-to-Analog

A Wirelessly Powered Implantable Stimulator IC for Relieving Gastroesophageal Reflux Disease

電機工程學系

植入式晶片、負載調變、無線功率傳輸、Implanted chip、Load shift keying modulation、Wireless power transmission

A procedure for improving the writing performance of the multi-chip MLC NAND flash memory

電機學院電機與控制學程

快閃記憶體、寫入速度、多層式儲存、MLC NAND flash、multi-chip、Improving Writing Performance

Implementation of a Low-Power Fast-Locking 1.20GHz to 6.95GHz All Digital Phase Locked Loop

電控工程研究所

數位式鎖相迴路、快速鎖定、寬幅調整、DPLL、Fast-locking、Wide-tuning

Implementation of a Digitally Calibrated 12-bit 25MS/s SAR ADC with an Asynchronous Clock Generator

電控工程研究所

校正法、權重、連續近似類比至數位產生器、Calibration、Weight、SAR ADC

Implementation of a 13-bit 100-MS/s Pipelined ADC with the Multi-Correlation Based Digital Background Calibration

電機工程學系

管線式類比數位轉換器、數位背景式校正、Pipelined ADC、Digital Background Calibration

Design of a Low-Cost Angle Demodulator IC Using a Novel Periodically Resetting Integration Technique

電機工程學系

微型慣性感測模組、同調干涉儀、週期性重置積分、角度解調變電路、optical-fiber interferometric sensor、path-matched differential interferometry、sinewave modulation、periodically resetting integration、angle demodulator

Electret Energy Harvesters Fabricated with Flexible Printed Circuit Boards

電機資訊國際學程・共同指導：邱一

能量擷取、駐極體、Energy Harvesting、Power MEMS、Electret

A CMOS-MEMS Capacitive Accelerometer with Differential LC-tank Oscillator and Digital Output

電控工程研究所・共同指導：邱一

微機電、電容式加速度計、震盪器、CMOS MEMS、capacitive、accelerometer、oscillator

CMOS-MEMS Piezoresistive Accelerometer with Frequency Output

電控工程研究所・共同指導：邱一

加速度計、壓阻式、微機電、頻率輸出、振盪器、體型微加工、accelerometer、piezoresistive、MEMS、frequency output、oscillator、CMOS-MEMS、bulk micromachining

Design of a 13-bit 100-MS/s Pipelined ADC with Digital Background Calibration in 0.18-um CMOS

電控工程研究所

導管式類比數位轉換器、數位背景式校正、Pipelined ADC、Digital background calibration

Design of a Fast-Locking 460.1MHz to 6.177GHz All-Digital Phase Locked Loop

電控工程研究所

全數位式鎖相迴路、快速鎖定、寬幅調整、錯位法、ADPLL、Fast Locking、Wide Tuning Range、Regula Falsi

A 12-bit 25MS/s Asynchronous SAR ADC With All Digital Background Calibration

電控工程研究所

連續近似類比數位轉換器、背景校正、SAR ADC、Background Calibration

A 14-bits 100-MS/s Current-Steering D/A Converter with Foreground Calibration

電控工程研究所

數位類比轉換器、電流導向式、校正、DAC、Current-steering、Calibration